Development of Chip Model Library for the Computer-aided Analysis of Electronic Packages

This paper discusses the development of a chip model library f o r the complete design and simulat ion of Multichip Assemblies. The simulation of the driver/receiver part of the chips mounted i n Multichap Modules(MC1Ms) can be done using a variety of models at varying levels of complexity. A hierarchy i s used t o organize the models for use with an intelligent model selection tool. Model selection i s based on the trade08 between accuracy and speed. The f o u r models t o be considered in this paper are device, tablebased, equation based and simple RC models. The basic RC model, a physical model, considers transist o r on-resistance and load capacitance as a complete representation of the driver circuit. The table lookup approach stores a detailed transfer function of device operation or circuit operation i n a table using a device level circuit simulator. Equation-based models simplify the physical device equations based on the switching behavior of a particular circuit. A n integral environment with this group of models is developed with an object oriented approach. Each of the model templates is treated as an object and it can be repeated as required.